Advantech PCI-1731 Specifiche Scaricare il pdf (Pagina 56)

APPENDIX D

PCI-1711/1731 User’s Manual

Advantech Co., Ltd.

www.advantech.com

– 52 –

Since the 82C54 counter uses a 16-bit structure, each section of

read/write data is split into a least significant byte (LSB) and most

significant byte (MSB). To avoid errors it is important that you make

read/write operations in pairs and keep track of the byte order.

The data format for the control register is as below:

BASE+30(Dec) 82C54 control, standard mode

Bit D7 D6 D5 D4 D3 D2 D1 D0

Value SC1 SC0 RW1 RW0 M2 M1 M0 BCD

Description:

SC1 & SC0 Select counter

Counter SC1 SC0

000

101

210

Read-back command 1 1

RW1 & RW0 Select read/write operation

Operation RW1 RW0

Counter latch 0 0

Read/write LSB 0 1

Read/write MSB 1 0

Read/write LSB first, 1 1

then MSB

M2, M1 & M0 Select operating mode

M2 M1 M0 Mode Description

0 0 0 0 Stop on terminal count

0 0 1 1 Programmable one shot

X 1 0 2 Rate generator

X 1 1 3 Square wave rate generator

1 0 0 4 Software triggered strobe

1 0 1 5 Hardware triggered strobe

BCD Select binary or BCD counting

BCD Type

0 Binary counting 16-bits

1 Binary coded decimal (BCD) counting

1 2 ... 51 52 53 54 55 56 57 58 59 60

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Advantech PCI-1731 Specifiche Pagina 56